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ELK GROVE, Calif., April 24, 2019 (GLOBE NEWSWIRE) -- Accellera Systems Initiative (Accellera), the electronics industry organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards, announced today the formation of a Proposed Working Group (PWG) to focus on the standardization of analog/mixed signal extensions (AMS) for the Universal Verification Methodology (UVM) standard.
“There have been many discussions in recent years about the need to make UVM more mixed-signal aware,” stated Lu Dai, Chair of Accellera. “The purpose of the PWG is to explore the need further and to determine the level of industry interest and commitment in moving forward with standardization efforts to create a UVM-AMS standard. We look forward to the input from the community at the kickoff meeting in Munich next month.”
“Our ambition is to apply UVM for both digital and analog/mixed-signal verification,” stated Martin Barnasconi, Accellera Technical Committee Chair. “The UVM-AMS PWG will assess the benefits of creating analog and mixed-signal extensions to UVM and determine if a path to standardization is feasible. We encourage all interested companies to join our initial PWG meeting and provide input for standardization.”
The first UVM-AMS Proposed Working Group meeting will be held Wednesday, May 22 at NXP Semiconductors, Schatzbogen 7, 81829 Munich, Germany. The meeting is planned from 10am to 4pm CEST and will cover presentations on industry best practices, discuss scope and requirements, and explore directions for standardization. Attendance is open to everyone, but registration is required. For more information on the UVM-AMS PWG, visit here.
Participants in the PWG do not need to be from Accellera member companies. Companies that have already shown an interest in standardization in this area include Xilinx, NXP Semiconductors, Infineon Technologies, Maxim Integrated, ams AG, STMicroelectronics, Dialog Semiconductor, Cirrus Logic, and Renesas.
Background on UVM-AMS Proposed Working Group
There have been various proposals presented at recent DVCon events addressing the need for AMS extensions for UVM to enrich and improve the verification of analog/mixed-signal products and applications. Most of these proposals offer similar capabilities, but often use different implementations to resolve existing constraints enforced by UVM or to address limitations caused by mixing languages such as SystemVerilog and Verilog-AMS. The objective of the PWG is to explore the need for standardized UVM mixed-signal extensions and offer a unified approach for mixed-signal verification.
About Accellera Systems Initiative
Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit www.accellera.org. Find out more about membership. Follow @accellera on Twitter or to comment, please use #accellera. Accellera Global Sponsors are: Cadence; Mentor, A Siemens Business; and Synopsys.
Accellera and Accellera Systems Initiative are trademarks of Accellera Systems Initiative Inc. All other trademarks and trade names are the property of their respective owners.
For more information, contact:
Public Relations for Accellera Systems Initiative
Phone: +1 503 209 2323